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1

Scan Integrity Tests for EDT Compression

Cheng, Wu-Tung, Rajski, Grzegorz Mrugalski Janusz, Trawka, Maciej, Tyszer, Jerzy

Journal:

IEEE Design and Test

Year:

2020

Language:

english

File:

PDF, 4.41 MB

english, 2020

2

Isolation of Failing Scan Cells through Convolutional Test Response Compaction

Grzegorz Mrugalski, Janusz Rajski, Chen Wang, Artur Pogiel, Jerzy Tyszer

Journal:

Journal of Electronic Testing

Year:

2007

Language:

english

File:

PDF, 315 KB

english, 2007

3

Test Time Reduction in EDT Bandwidth Management for SoC Designs

Janicki, Jakub, Kassab, Mark, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2013

Language:

english

File:

PDF, 585 KB

english, 2013

4

Fault Diagnosis with Orthogonal Compactors in Scan-Based Designs

Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jędrzej Solecki, Jerzy Tyszer

Journal:

Journal of Electronic Testing

Year:

2011

Language:

english

File:

PDF, 299 KB

english, 2011

5

[IEEE 2011 IEEE 20th Asian Test Symposium (ATS) - New Delhi, India (2011.11.20-2011.11.23)] 2011 Asian Test Symposium - Fault Diagnosis in Memory BIST Environment with Non-march Tests

Mrugalski, Grzegorz, Pogiel, Artur, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy, Urbanek, Pawel

Year:

2011

File:

PDF, 1.07 MB

2011

6

[IEEE 2015 IEEE 24th Asian Test Symposium (ATS) - Mumbai, India (2015.11.22-2015.11.25)] 2015 IEEE 24th Asian Test Symposium (ATS) - TestExpress - New Time-Effective Scan-Based Deterministic Test Paradigm

Mrugalski, Grzegorz, Rajski, Janusz, Solecki, Jedrzej, Tyszer, Jerzy, Wang, Chen

Year:

2015

Language:

english

File:

PDF, 1.10 MB

english, 2015

7

Autonomous Scan Patterns for Laser Voltage Imaging

Tyszer, Jerzy, Cheng, Wu-Tung, Milewski, Sylwester, Mrugalski, Grzegorz, Rajski, Janusz, Trawka, Maciej

Journal:

IEEE Transactions on Emerging Topics in Computing

Year:

2019

File:

PDF, 5.36 MB

2019

8

EDT Bandwidth Management in SoC Designs

Janicki, Jakub, Kassab, Mark, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2012

Language:

english

File:

PDF, 4.69 MB

english, 2012

9

[IEEE 2009 27th IEEE VLSI Test Symposium (VTS) - Santa Cruz, CA, USA (2009.05.3-2009.05.7)] 2009 27th IEEE VLSI Test Symposium - Highly X-Tolerant Selective Compaction of Test Responses

Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Czysz, Dariusz, Tyszer, Jerzy

Year:

2009

Language:

english

File:

PDF, 753 KB

english, 2009

10

[ACM Press the 44th annual conference - San Diego, California (2007.06.04-2007.06.08)] Proceedings of the 44th annual conference on Design automation - DAC '07 - New test data decompressor for low power applications

Mrugalski, Grzegorz, Rajski, Janusz, Czysz, Dariusz, Tyszer, Jerzy

Year:

2007

Language:

english

File:

PDF, 159 KB

english, 2007

11

[IEEE 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC) - San Francisco, CA, USA (2014.6.1-2014.6.5)] 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC) - On using implied values in EDT-based test compression

Gebala, Marcin, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy

Year:

2014

Language:

english

File:

PDF, 621 KB

english, 2014

12

[IEEE 2014 IEEE 23rd Asian Test Symposium (ATS) - Hangzhou, China (2014.11.16-2014.11.19)] 2014 IEEE 23rd Asian Test Symposium - High-Speed Serial Embedded Deterministic Test for System-on-Chip Designs

Trawka, Maciej, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Pogiel, Artur, Rajski, Janusz, Janicki, Jakub, Tyszer, Jerzy

Year:

2014

Language:

english

File:

PDF, 1.19 MB

english, 2014

13

Erratum to “Test Time Reduction in EDT Bandwidth Management for SoC Designs” [Nov 13 1776-1786]

Janicki, Jakub, Kassab, Mark, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 532 KB

english, 2014

14

[IEEE 2011 16th IEEE European Test Symposium (ETS) - Trondheim, Norway (2011.05.23-2011.05.27)] 2011 Sixteenth IEEE European Test Symposium - Reduced ATE Interface for High Test Data Compression

Czysz, Dariusz, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy

Year:

2011

Language:

english

File:

PDF, 564 KB

english, 2011

15

Low-Power Programmable PRPG With Test Compression Capabilities

Filipek, Michal, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Nadeau-Dostie, Benoit, Rajski, Janusz, Solecki, Jedrzej, Tyszer, Jerzy

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2015

Language:

english

File:

PDF, 4.42 MB

english, 2015

16

[IEEE 2012 IEEE 30th VLSI Test Symposium (VTS) - Maui, HI, USA (2012.04.23-2012.04.25)] 2012 IEEE 30th VLSI Test Symposium (VTS) - Test generator with preselected toggling for low power built-in self-test

Rajski, Janusz, Tyszer, Jerzy, Mrugalski, Grzegorz, Nadeau-Dostie, Benoit

Year:

2012

Language:

english

File:

PDF, 720 KB

english, 2012

17

[IEEE 2015 IEEE International Test Conference (ITC) - Anaheim, CA, USA (2015.10.6-2015.10.8)] 2015 IEEE International Test Conference (ITC) - A deterministic BIST scheme based on EDT-compressed test patterns

Mrugalski, Grzegorz, Rajski, Janusz, Rybak, Lukasz, Solecki, Jedrzej, Tyszer, Jerzy

Year:

2015

Language:

english

File:

PDF, 1015 KB

english, 2015

18

Cutting tool wear in turning 316L stainless steel in the conditions of minimized lubrication

Szczotkarz, Natalia, Mrugalski, Roland, Maruda, RadosÅaw W., KrÃ³lczyk, Grzegorz M., Legutko, StanisÅaw, Leksycki, Kamil, DÄbowski, Daniel, Pruncu, Catalin I.

Journal:

Tribology International

Year:

2020

File:

PDF, 374 KB

2020

19

Star-EDT: Deterministic On-Chip Scheme Using Compressed Test Patterns

Mrugalski, Grzegorz, Rajski, Janusz, Rybak, Lukasz, Solecki, Jedrzej, Tyszer, Jerzy

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2016

Language:

english

File:

PDF, 7.79 MB

english, 2016

20

[IEEE 2010 15th IEEE European Test Symposium (ETS) - Praha, Czech Republic (2010.05.24-2010.05.28)] 2010 15th IEEE European Test Symposium - Diagnosis of failing scan cells through orthogonal response compaction

Benware, Brady, Mrugalski, Grzegorz, Pogiel, Artur, Rajski, Janusz, Solecki, Jedrzej, Tyszer, Jerzy

Year:

2010

Language:

english

File:

PDF, 748 KB

english, 2010

21

Trimodal Scan-Based Test Paradigm

Mrugalski, Grzegorz, Rajski, Janusz, Solecki, Jedrzej, Tyszer, Jerzy, Wang, Chen

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2016

Language:

english

File:

PDF, 4.01 MB

english, 2016

22

[IEEE 2011 16th IEEE European Test Symposium (ETS) - Trondheim, Norway (2011.05.23-2011.05.27)] 2011 Sixteenth IEEE European Test Symposium - Diagnosis of Failing Scan Cells through Orthogonal Response Compaction

Benware, Brady, Mrugalski, Grzegorz, Pogiel, Artur, Rajski, Janusz, Solecki, Jedrzej, Tyszer, Jerzy

Year:

2011

Language:

english

File:

PDF, 349 KB

english, 2011

23

[IEEE 25th IEEE VLSI Test Symmposium - Berkeley, CA, USA (2007.05.6-2007.05.10)] 25th IEEE VLSI Test Symmposium (VTS'07) - Low Power Embedded Deterministic Test

Czysz, Dariusz, Mrugalski, Grzegorz, Rajski, Janusz, Tyszer, Jerzy

Year:

2007

Language:

english

File:

PDF, 269 KB

english, 2007

24

[ACM Press the 43rd annual conference - San Francisco, CA, USA (2006.07.24-2006.07.28)] Proceedings of the 43rd annual conference on Design automation - DAC '06 - Test response compactor with programmable selector

Mrugalski, Grzegorz, Rajski, Janusz, Tyszer, Jerzy

Year:

2006

Language:

english

File:

PDF, 647 KB

english, 2006

25

[IEEE 2020 IEEE European Test Symposium (ETS) - Tallinn, Estonia (2020.5.25-2020.5.29)] 2020 IEEE European Test Symposium (ETS) - Test Sequence-Optimized BIST for Automotive Applications

Kaczmarek, Bartosz, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Rybak, Lukasz, Tyszer, Jerzy

Year:

2020

File:

PDF, 2.47 MB

2020

26

Scan Test Bandwidth Management for Ultralarge-Scale System-on-Chip Architectures

Cheng, Wu-Tung, Dong, Yan, Gilles, Grady, Huang, Yu, Janicki, Jakub, Kassab, Mark, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2015

Language:

english

File:

PDF, 3.65 MB

english, 2015

27

[ACM Press the The 51st Annual Design Automation Conference - San Francisco, CA, USA (2014.06.01-2014.06.05)] Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference - DAC '14 - On Using Implied Values in EDT-based Test Compression

Gębala, Marcin, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy

Year:

2014

Language:

english

File:

PDF, 610 KB

english, 2014

28

[IEEE 2014 IEEE 23rd Asian Test Symposium (ATS) - Hangzhou, China (2014.11.16-2014.11.19)] 2014 IEEE 23rd Asian Test Symposium - Low Power Test Compression with Programmable Broadcast-Based Control

Milewski, Sylwester, Mrugalski, Grzegorz, Rajski, Janusz, Tyszer, Jerzy

Year:

2014

Language:

english

File:

PDF, 675 KB

english, 2014

29

[IEEE 2019 IEEE 37th VLSI Test Symposium (VTS) - Monterey, CA, USA (2019.4.23-2019.4.25)] 2019 IEEE 37th VLSI Test Symposium (VTS) - On Cyclic Scan Integrity Tests for EDT-based Compression

Cheng, Wu-Tung, Mrugalski, Grzegorz, Rajski, Janusz, Trawka, Maciej, Tyszer, Jerzy

Year:

2019

Language:

english

File:

PDF, 1.18 MB

english, 2019

30

[IEEE 2012 17th IEEE European Test Symposium (ETS) - Annecy, France (2012.05.28-2012.05.31)] 2012 17TH IEEE EUROPEAN TEST SYMPOSIUM (ETS) - Bandwidth-aware test compression logic for SoC designs

Janicki, Jakub, Tyszer, Jerzy, Mrugalski, Grzegorz, Rajski, Janusz

Year:

2012

Language:

english

File:

PDF, 874 KB

english, 2012

31

[IEEE 2011 IEEE 20th Asian Test Symposium (ATS) - New Delhi, India (2011.11.20-2011.11.23)] 2011 Asian Test Symposium - Low Power Decompressor and PRPG with Constant Value Broadcast

Filipek, Michal, Fukui, Yoshiaki, Iwata, Hiroyuki, Mrugalski, Grzegorz, Rajski, Janusz, Takakura, Masahiro, Tyszer, Jerzy

Year:

2011

File:

PDF, 795 KB

2011

32

[IEEE 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC) - San Francisco, CA, USA (2014.6.1-2014.6.5)] 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC) - On using implied values in EDT-based test compression

Gebala, Marcin, Mrugalski, Grzegorz, Mukherjee, Nilanjan, Rajski, Janusz, Tyszer, Jerzy

Year:

2014

File:

PDF, 621 KB

2014

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